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INTEGRATED CIRCUITS
DATA SHEET
PCF26100 Bluetooth Adapter IC
Preliminary specification File under Integrated Circuits, IC17 2001 Jun 19
Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
CONTENTS 1 2 3 4 5 5.1 5.2 6 6.1 6.2 6.3 6.4 6.5 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 13.5 14 15 16 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION PCF26100 overview BlueRF pin mapping Timing Serial interface Registers REFERENCE DOCUMENTS LIMITING VALUES DC CHARACTERISTICS AC CHARACTERISTICS APPLICATIONS PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS
PCF26100
2001 Jun 19
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
1 FEATURES
PCF26100
* Provides radio ID through the serial JTAG interface * System clock oscillator trimming. 2 GENERAL DESCRIPTION
The PCF26100 performs the following functions: * Power-on reset (reset) * System clock generation for baseband controller * Reference clock generation for the UAA3558 * Low-power clock generation for baseband controller * Transmit clock generation for baseband controller (1 MHz) * Serial interface conversion between JTAG and 3-wire S-bus * Timing control generation for the UAA3558 * Transmit data conversion from digital-to-analog gaussian shaped * RSSI conversion from analog-to-digital and access through serial JTAG interface * Transmit PA control information from JTAG interface digital-to-analog conversion 3 ORDERING INFORMATION TYPE NUMBER PCF26100ET
The PCF26100 is a mixed signal based adapter device for wireless Bluetooth systems. The device adapts the baseband interface of the Philips UAA3558 radio to the Philips PCF26002 and PCF26003 baseband controller devices and also to the BlueRF JTAG Unidirectional RxMode 2. The adapter is provided as a low risk solution to a working Bluetooth system based on existing components. The adapter ASIC implementation incorporates, as much as possible, features to come to a complete Bluetooth system, meeting the Bluetooth RF requirements. From the Bluetooth system point of view the PCF26100 is a transparent adaptation device between the baseband controller and the UAA3558 radio.
PACKAGE NAME TFBGA48 DESCRIPTION plastic thin fine-pitch ball grid array package; 48 balls; 5 x 5 x 0.8 mm VERSION SOT641-1
2001 Jun 19
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
4 BLOCK DIAGRAM
PCF26100
handbook, full pagewidth
VSS VDD
VSS(osc) VSS(I/O) VSSA XIN XOUT UBMODE
VDD(osc) VDD(I/O) VDDA
SYS_CLK SYS_CLK_REQ
SYSTEM CLOCK
MCLK OSCILLATOR
REFERENCE CLOCK
REF_CLK
LPO_CLK
LOW POWER CLOCK DIVIDER TRANSMIT DATA CLOCK DIVIDER
XOTRIM 2.048 MHz DIVIDER T_SW MUX T_SW
TX_CLK
TX_DATA RX/TX MUX RX_DATA GFSK FILTER
DAC
T_GFSK
RX SAMPLE
R_DATA
PCF26100
SLCCTR SYNTH_ON TIMING CONTROL PX_ON DAC ID SI_CMS SI_CLK SI_CDO SI_CDI CHANNEL CHANNEL STATIC SERIAL INTERFACE 3-WIRE INTERFACE S_DATA S_CLK RSSI PACNTL S_EN PACNTL TIMING SETTINGS ADC RSSI
POR POR_EXT VIO_POWER
RESET AND POR
CHANNEL CONVERSION
TEST
MGT751
SCANTEST
TEST_EN
ANATEST
SHIFTCTRL
Fig.1 Block diagram.
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
5 5.1 PINNING INFORMATION Pinning
PCF26100
MBL245
H G F E D C B A
PCF26100ET
1
2
3
4
5
6
7
8
Fig.2 Pin configuration.
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Bluetooth Adapter IC
Table 1
Pin description for the TFABGA48 package BALL A1 C2 B1 C1 D1 E1 E2 F1 G1 F2 G2 H1 G3 H2 H3 H4 H5 G5 H6 H7 G6 G7 H8 F7 G8 F8 E8, D8 D7 C8 test mode power-on reset reference core supply voltage 3.2 kHz low-power clock to baseband controller receive packet synchronization correlation achieved I/O ground supply system clock control input from baseband controller controlled system clock output to baseband controller transmit data clock output to baseband controller core ground supply receive data output to baseband controller test mode oscillator ground supply oscillator output oscillator input oscillator supply voltage I/O supply voltage reset and POR on control input test mode DC offset control to UAA3558 I/O ground supply serial interface and timing control output to UAA3558 serial interface clock output to UAA3558 serial interface data output to UAA3558 reference clock output to UAA3558 analog ground supply RSSI analog input from UAA3558 analog transmit data output to UAA3558 DESCRIPTION reset output to baseband controller I/O O I I P O I P I O O P O I P O I P P I I O P O O O O P I O SIGNAL TYPE 1 x CMOS output non-inverting CMOS input with pull-down Schmitt-trigger input core power 1 x CMOS output non-inverting CMOS input I/O ground non-inverting CMOS input 3 x CMOS output 1 x CMOS output core ground 1 x CMOS output non-inverting CMOS input with pull-down oscillator ground oscillator output oscillator input oscillator power I/O power non-inverting CMOS input non-inverting CMOS input with pull-down 1 x CMOS output I/O ground 1 x CMOS output 1 x CMOS output 1 x CMOS output 3 x CMOS output analog ground analog input analog output UAA UAA UAA UAA host test misc misc BB test BB BB BB BB BB SOURCE BB test
SYMBOL POR SHIFTCTRL VIO_POWER VDD LPO_CLK PX_ON VSS(I/O) SYS_CLK_REQ SYS_CLK TX_CLK VSS RX_DATA ANATEST VSS(osc) XOUT XIN VDD(osc) VDD(I/O) POR_EXT TEST_EN SLCCTR VSS(I/O) S_EN S_CLK S_DATA REF_CLK VSSA RSSI T_GFSK
Preliminary specification
PCF26100
UAA UAA
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 2001 Jun 19 7 Philips Semiconductors SYMBOL PACNTL VDDA R_DATA T_SW SCANTEST TX_DATA VSS(I/O) SYNTH_ON UBMODE VDD(I/O) SI_CLK SI_CMS SI_CDI SI_CDO BALL B8 C7 B7 A8 B6 A7 A6 A5 A4 B4 A3 A2 B3 B2 DESCRIPTION analog PA control output to external PA analog supply voltage receive data input from UAA3558 (UAA3558 output = 0 to 2.2 V) transmit switch timing control to UAA3558 multiplexed with 2.048 MHz clock output test mode transmit data I/O ground supply timing control input from baseband controller unidirectional/bidirectional mode selection I/O supply voltage serial interface clock input from baseband controller serial interface mode select input from baseband controller serial interface data input from baseband controller serial interface data output to baseband controller I/O O P I O I I P I I P I I I O analog power non-inverting CMOS input 3 x CMOS output non-inverting CMOS input with pull-down non-inverting CMOS input I/O ground non-inverting CMOS input non-inverting CMOS input I/O power non-inverting CMOS input non-inverting CMOS input non-inverting CMOS input 1 x CMOS output BB BB BB BB BB misc UAA UAA test BB SIGNAL TYPE analog output SOURCE misc
Bluetooth Adapter IC PCF26100
Preliminary specification
Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
6 6.1 FUNCTIONAL DESCRIPTION PCF26100 overview
PCF26100
The digital power amplifier control information communicated from the baseband controller to the PCF26100 is converted to an analog control voltage for the radio. The PCF26100 provides an identification number, which can be read by the baseband controller through the JTAG interface. For frequency compensation and tuning, the PCF26100 provides a tuning capability on the system oscillator. 6.2 BlueRF pin mapping Adapter and BlueRF unidirectional pin mapping. BLUERF PIN NAME JTAG UNIDIRECTIONAL RXMODE 2 BnPWR not applicable not applicable not applicable BXTLEN BRCLK BTXD/BDATA1 BRXD BSEN BPKTCTL/BDATA2 BnDEN BDCLK BMOSI/BDDATA BMISO not applicable
The adapter features a Power-on reset which is used to reset the adapter logic. There is also a POR_EXT signal which is used for controlling the reset of the PCF26100 within the application. The system clock for the application is generated by the PCF26100. The system clock is then provided to the baseband SYS_CLK and the radio REF_CLK. Both the SYS_CLK and REF_CLK clocks are controlled within the PCF26100. From the system clock a low-power 3.2 kHz clock LPO_CLK is generated. From the PCF26100 a 1 MHz TX_CLK is generated to be used in the baseband controller to clock out the transmit data on TX_DATA. The serial interface to the baseband controller is a JTAG interface. This interface is used to initialize and control the PCF26100 and subsequently the radio. The channel information received from the JTAG interface is converted and forwarded to the radio 3-wire S-bus interface. The timing control signals to the UAA3558 radio are generated in the PCF26100. For this a minimum number of reference timing signals from the baseband controller are used. The exact timing of the control signals is programmable in the PCF26100. The PCF26100 converts the digital transmit data from the baseband controller to analog gaussian shaped transmit data to the radio. The analog RSSI from the radio is converted to digital and made available to the baseband controller via the JTAG interface.
Table 2
ADAPTER TO BASEBAND PIN NAME POR_EXT POR LPO_CLK SYS_CLK SYS_CLK_REQ TX_CLK TX_DATA RX_DATA SYNTH_ON PX_ON SI_CMS SI_CLK SI_CDI SI_CDO VIO_POWER
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
6.3 Timing
PCF26100
The timing for the radio is generated in the PCF26100 using a minimal number of baseband signals. The channel programming is received from the JTAG serial interface. The SYNTH_ON signal is used to determine the start and end of the packet. The radio SLCCTR signals is also controlled with PX_ON.
handbook, full pagewidth
TX packet
RX packet
JTAG SYNTH_ON PX_ON
TX_DATA RX_DATA
S_xxx t1 REF_CLK t2 S_EN t5 t6 t7 t9 T_SW t 17 T_GFSK t 10 R_DATA SLCCTR t 13 RSSI TX_CLK t 10 t 12 t4
MGT756
t1
t3
t2
t3
t5
t6
t8 t9
t 18
t 11
t 12
t 14
Fig.3 Detailed timing diagram.
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
Table 3 Adapter timing parameters DESCRIPTION SYNTH_ON rising edge to 3-wire serial data SYNTH_ON rising edge to REFCLK start S_EN falling edge to REFCLK stop delay S_EN falling edge to RSSI measurement SYNTH_ON rising edge to S_EN rising edge S_EN width SYNTH_ON falling edge to S_EN pulse rising edge SYNTH_ON falling edge to S_EN pulse rising edge S_EN pulse width SYNTH_ON rising edge to T_GFSK DC bias and TXCLK enable TX_DATA digital in to T_GFSK analog out delay S_EN pulse falling edge to T_GFSK LOW and TXCLK disable S_EN falling edge to SLCCTR rising edge PX_ON rising edge to SLCCTR falling edge SYNTH_ON rising edge to T_SW rising edge S_EN pulse falling edge to T_SW falling edge 0.35 S_EN start 2 RSSI_start S_EN start S_EN width S_EN pulse start S_EN pulse start 2 GFSK_DC_bias start 14 0 SLCCTR start 0 T_SW start 0 VALUE
PCF26100
PARAMETER t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t17 t18 6.3.1
UNIT s s s s s s s s s s 13 MHz cycles s s s s s
T_GFSK
The T_GFSK data output has 3 phases: 1. Idle phase 2. DCbias phase 3. Txdata phase. The Idle phase is used outside transmit packets. In this phase the T_GFSK output state is defined by the `gfsk float' bit in the Enable Register. If the `gfsk float' bit is set to a logic 0, the T_GFSK output is pulled to ground; if set to a logic 1 the T_GFSK output is floating. The DCbias phase is used during the transmit slot as start-up phase before the transmit data. The DCbias phase is active GFSK_DC_BIAS_Start delay following the S_EN rising edge until the first transmit data bit on TX_DATA. During this phase a DC bias is generated by the GFSK filter, which is achieved by selecting the GFSK table mid-value as the output of the GFSK filter.
The Txdata phase is used when TXDATA is present. In this phase the TX_DATA is fed into the GFSK filter. The presence of TXDATA is determined by detecting the first TXDATA edge. The end of the TXDATA is detected by the end of packet from the baseband controller. To not lose TXDATA information in the T_GFSK output, due to the data detection, the data from the GFSK input is delayed with 1-bit. The T_GFSK output requires an external low-pass filter. The reference voltage for the T_GFSK comes directly from the VDDA power supply. Any variation on VDDA has a direct relation to a variation in the T_GFSK levels. The VDDA power supply should be provided from a voltage reference. The TX_CLK output is activated during the DC_BIAS phase and the Txdata phase.
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Preliminary specification
Bluetooth Adapter IC
6.3.2 RESET
PCF26100
The function of SYS_CLK_REQ has 2 phases: 1. After reset, SYS_CLK_REQ is not taken into account for the generation of SYS_CLK. After reset the 13 MHz system clock is enabled on SYS_CLK. 2. Once the `rdy' bit is set to logic 1, the 13 MHz clock on the SYS_CLK is controlled with SYS_CLK_REQ. The SYS_CLK_REQ signal will not control or disable the oscillator. The LPO_CLK output is only controlled by the POR_EXT signal which also controls the POR output. The POR is activated 4 SYS_CLK cycles after POR_EXT.
The PCF26100 is reset with a Power-on reset using the VIO_POWER signal. This will reset all registers and put the device into a known state. The POR_EXT reset signal will also reset the device and put it in the same state as the Power-on reset. However, POR_EXT is intended to be used for a reset from a host. Following the Power-on reset or a reset by POR_EXT, the system oscillator is started and the SYS_CLK output is activated (enabled). The SYS_CLK output can be controlled by the SYS_CLK_REQ signal but only if the `rdy' bit in the Control Register has been set to logic 1.
handbook, full pagewidth
VIO_POWER
OSC
SYS_CLK_REQ
SYS_CLK
POR_EXT
POR
LPO_CLK
phase 1 Rdy = 0
phase 2 Rdy = 1
MGT755
Fig.4 Reset timing.
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
6.4 6.4.1 Serial interface 3-WIRE S-BUS
PCF26100
The 3-wire S-bus at the radio side is a 32-bit serial interface which is used for control, TX/RX and channel information. The 32-bit definition is given in Tables 4 and 5. Bits 31 to 9 are static values and will not change dynamically, the value for these bits come from the static registers. Only the trx and main divider fields will control the UAA3558 on a slot-by-slot basis. The trx and main divider information comes from the baseband controller serial interface channel word; see Section 6.5.1. However, the baseband controller channel information needs a conversion to get the correct main divider information for the UAA3558. Table 4 31 UAA3558 3-wire programming word 30 test Table 5 15 tsw 6.4.2 29 28 27 dpo 26 25 24 23 22 strc 21 sdsn 20 sdco 19 ssqs 18 ssth 17 dmo 16 tin
BW adjust
UAA3558 3-wire programming word (continued) 14 tamp JTAG 13 ref1 12 ref0 11 txp1 10 txp0 9 pll 8 trx 7 6 5 4 3 2 1 0
main divider (n)
The JTAG serial interface is used to control the PCF26100 and subsequently the radio. The PCF26100 must be the only slave on the JTAG bus as the PCF26100 does not allow for multi-slave operation. The JTAG interface protocol used is fully compliant with the standard set out in "IEEE Std 1149.1-1990". The following features are supported: * 5-bit register address * 8-bit data * Set instruction register * Read/write data register (note: some addresses have a separate read and write data register). The JTAG interface allows for 2 ways of accessing a register. One is the communicate address and data, and the second one is for successive accesses to the same registers where only the data is communicated. This can, for example, be used for updating the channel information before every packet.
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Preliminary specification
Bluetooth Adapter IC
6.5 Registers
PCF26100
The registers that are controlled via the serial interface are shown in Table 6. Table 6 Register map REGISTER S_EN_start S_EN_width T_SW_start SLCCTR_start S_EN_PULSE_start RSSI_start STATIC_B15_9 STATIC_B23_16 STATIC_B31_24 CHANNEL RSSI XO-trim ID CONTROL PACONTROL ENABLE GFSK_DC_BIAS_start GFSK_TABLE RXFREQ TXFREQ 6.5.1 TYPE R/W R/W R/W R/W R/W R/W R/W R/W R/W W R W R R/W R/W R/W R/W R/W W W ADDRESS (DECIMAL) 8 9 10 11 12 13 14 15 16 18 18 19 19 22 24 25 26 28 30 31 RESET (HEX) 0C C8 64 0A 02 64 24 12 00 00 00 80 A1 00 00 00 64 00 61 60 S_EN start delay S_EN width T_SW start delay SLCCTR start delay S_EN pulse start delay RSSI measurement position UAA3558 serial word static values UAA3558 serial word static values UAA3558 serial word static values frequency channel number and TX/RX information RSSI trim value for the system clock oscillator device identification system clock control for external PA power control adapter control GFSK DC bias start delay GFSK look-up table values RX channel conversion number TX channel conversion number DESCRIPTION
CHANNEL PROGRAMMING
The serial interface channel programming word is forwarded to the UAA3558 3-wire interface. The channel information cannot normally be used directly and needs a conversion to get the right number for the UAA3558. Table 7 Channel programming word ADDRESS 18 (decimal) Table 8 7 trx 6 5 4 3 channel number (m) 2 1 0
Description of Channel programming word bits BIT 7 6 to 0 DESCRIPTION If trx = 0, then device in Transmit mode. If trx = 1, then device in Receive mode. These 7 bits determine the channel number (m).
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Preliminary specification
Bluetooth Adapter IC
6.5.2 FREQUENCY CHANNEL CONVERSION
PCF26100
The conversion number is programmable for TX and RX. The function implemented is: TX frequency = 2304 + m + TXFREQ; where m is the BT channel number and TXFREQ is programmable between 0 and 255 RX frequency = 2304 + m + RXFREQ; where m is the BT channel number and RXFREQ is programmable between 0 and 255. Table 9 Frequency conversion word RXFREQ ADDRESS 30 (decimal) Table 10 Frequency conversion word TXFREQ ADDRESS 31 (decimal) 6.5.3 STATIC VALUES 7 6 5 4 TXFREQ 3 2 1 0 7 6 5 4 RXFREQ 3 2 1 0
The UAA3558 bits 31 to 9 are static values and will not change dynamically. These values are programmed into the adapter via the serial interface. The static words are: STATIC_B15_9, STATIC_B23_16 and STATIC_B31_24. Table 11 Static word STATIC_B15_9 ADDRESS 14 (decimal) Table 12 Static word STATIC_B23_16 ADDRESS 15 (decimal) Table 13 Static word STATIC_B31_24 ADDRESS 16 (decimal) 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 not used
static value bits 15 to 9
static value bits 23 to 16
static value bits 31 to 24
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Preliminary specification
Bluetooth Adapter IC
6.5.4 TIMING VALUES
PCF26100
The UAA3558 needs some timing signals which do not have a corresponding signal at the BlueRF interface. These signals are generated internally in the adapter. The timing values for these will not change dynamically. These values are programmed into the adapter via the serial interface. The timing words are: S_EN_start, S_EN_width, T_SW_start, SLCCTR_start, S_EN_PULSE_start, RSSI_start, and GFSK_DC_bias. Table 14 Timing control word S_EN_start ADDRESS 8 (decimal) Table 15 Timing control word S_EN_width ADDRESS 9 (decimal) Table 16 Timing control word T_SW_start ADDRESS 10 (decimal) Table 17 Timing control word SLCCTR_start ADDRESS 11 (decimal) 7 6 5 4 3 2 1 0 programmed timing value (resolution of 1-bit = 1 s) 7 6 5 4 3 2 1 0 programmed timing value (resolution of 1-bit = 1 s) 7 6 5 4 3 2 1 0 programmed timing value (resolution of 1-bit = 1 s) 7 6 5 4 3 2 1 0 programmed timing value (resolution of 1-bit = 1 s)
Table 18 Timing control word S_EN_PULSE_start ADDRESS 12 (decimal) Table 19 Timing control word RSSI_start ADDRESS 13 (decimal) Table 20 Timing control word GFSK_DC_bias ADDRESS 26 (decimal) 7 6 5 4 3 2 1 0 programmed timing value (resolution of 1-bit = 1 s) 7 6 5 4 3 2 1 0 programmed timing value (resolution of 1-bit = 1 s) 7 6 5 4 3 2 1 0 programmed timing value (resolution of 1-bit = 1 s)
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Preliminary specification
Bluetooth Adapter IC
Table 21 Register values range and actual timings REGISTER S_EN_START S_EN_WIDTH T_SW_START SLCCTR_START S_EN_PULSE_DEL RSSI_START GFSK_DC_BIAS 6.5.5 RSSI RANGE 0 < x < 256 0 < x < 256 S_EN_START < x < 256 0 < x < 256 0 < x < 256 0 < x < 256 0 < x < 256 TIMING t2 and t5 t6 t17 t13 t7 and t8 t4 t10 ACTUAL VALUE S_EN_START + (0 to 1) S_EN_WIDTH T_SW_START + (0 to 1) SLCCTR_START + 1 S_EN_PULSE_DEL + (0 to 1) RSSI_START GFSK_DC_BIAS + (0 to 1)
PCF26100
UNIT s s s s s s s
The RSSI is read via the serial interface. The UAA3558 provides an analog RSSI output. The interface logic converts the analog RSSI value and stores the result in a serial interface register. The timing for converting the RSSI is programmed using the RSSI_start register. The RSSI can only be measured starting 10 s after the S_EN falling edge. The RSSI value can only be read from the serial interface register after the measurement has been completed, this is at the end of the packet. RSSI measurements are only done in receive packets. Table 22 RSSI control word ADDRESS 18 (decimal) 6.5.6 TRANSMIT POWER CONTROL 7 6 5 4 RSSI 3 2 1 0
The transmit power can be controlled from a serial interface register. The 8-bit transmit power control word is used to control the PA DAC. Writing to the PA DAC register will directly change the PA DAC output. The PA control register should be written when the transmitter is not active. Table 23 Unidirectional JTAG PA control word ADDRESS 24 (decimal) 6.5.7 GFSK TABLE 7 6 5 4 3 2 1 0
PA power control
The values for the GFSK filter are stored in a 13-byte GFSK table. The GFSK table is accessed through a single control word which is used to store the data in the GFSK table on subsequent writes. To align the writing to the GFSK table a table address reset bit is available in the Enable register. When the reset bit `grst' in the Enable register is set to a logic 1 the GFSK table address will be reset and the next GFSK control word is written at location 0 in the GFSK table. Every subsequent write to the GFSK control word will be stored at the next address in the GFSK table. If the last address is reached, subsequent writes will continue to effect the last address. The values for the GFSK table depend on the reference voltage on VDDA. The T_GFSK signal should have a DC_Bias of 1.2 V with a peak-to-peak swing of 1 V (amplitude = 0.5 V). For this the values for the GFSK table are calculated as shown in Table 26. Table 24 Unidirectional JTAG GFSK control word GFSK_TABLE 28 (decimal) 7 6 5 4 3 2 1 0
GFSK table value
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Preliminary specification
Bluetooth Adapter IC
Table 25 GFSK table reset values TABLE ADDRESS (DECIMAL) 12 11 10 9 8 7 6 5 4 3 2 1 0 Table 26 GFSK value calculation TABLE ADDRESS (DECIMAL) 0 1 2 3 4 5 6 7 8 9 10 11 12 Note Amp 255 1. Where A = ----------- and B = ------------96 V DDA [ DCBias + ( A x - 96 ) ] x B [ DCBias + ( A x - 94 ) ] x B [ DCBias + ( A x - 90 ) ] x B [ DCBias + ( A x - 80 ) ] x B [ DCBias + ( A x - 62 ) ] x B [ DCBias + ( A x - 34 ) ] x B [ DCBias + ( A x 0 ) ] x B [ DCBias + ( A x 34 ) ] x B [ DCBias + ( A x 62 ) ] x B [ DCBias + ( A x 80 ) ] x B [ DCBias + ( A x 90 ) ] x B [ DCBias + ( A x 94 ) ] x B [ DCBias + ( A x 96 ) ] x B CALCULATION(1) RESET VALUE (HEX) 91 90 8E 89 81 74 64 54 47 3E 3A 38 37
PCF26100
VALUE AT 3 V DECIMAL 59 60 62 66 74 87 102 117 130 138 142 144 145 HEX 3B 3C 3E 42 4A 57 66 75 82 8A 8E 90 91
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
6.5.8 CONTROL REGISTER (CONTROL)
PCF26100
The Control Register is used to control SYS_CLK in the adapter. Table 27 Control Register ADDRESS 22 (decimal) 7 - 6 - 5 - 4 - 3 - 2 rdy 1 - 0 -
Table 28 Description of CONTROL bits BIT 7 to 3 2 1 0 6.5.9 SYMBOL - rdy - - ENABLE REGISTER (ENABLE) DESCRIPTION These 5 bits are reserved and are not to be used. Baseband ready. This bit is used to control the function of SYS_CLK_REQ. These 2 bits are reserved and are not to be used.
The Enable Register is used to control functions in the adapter. Table 29 Enable Register ADDRESS 25 (decimal) 7 gfsk float 6 grst 5 pa float 4 clk en 3 test.2 2 test.1 1 test.0 0 -
Table 30 Description of ENABLE bits BIT 7 6 5 4 3 2 1 0 SYMBOL gfsk float grst pa float clk en test.2 test.1 test.0 - This bit is reserved and should not be used. DESCRIPTION Controls the T_GFSK output outside TX packet. If gfsk = 0, then output tied to ground. If gfsk = 1, then output floats. GFSK table address reset. Writing a logic 1 will reset the GFSK table addressing. Controls the PA output outside TX packet. If pa float = 0, then output tied to ground. If pa float = 1, then output floats. Enables the 2.048 MHz clock on T_SW. If clk en = 0, then pin T_SW = T_SW. If clk en = 1, then pin T_SW = 2.048 MHz. These 3 bits are used for test purposes.
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Preliminary specification
Bluetooth Adapter IC
6.5.10 OSCILLATOR TRIM REGISTER (XO_TRIM)
PCF26100
The Oscillator Trim Register is used to control the frequency of the 13 MHz oscillator. This is achieved by controlling the capacitive load on the XIN and XOUT pins. Table 31 Oscillator Trim Register ADDRESS 19 (decimal) 7 - 6 XO_trim. 6 5 XO_trim. 5 4 XO_trim. 4 3 XO_trim. 3 2 XO_trim. 2 1 XO_trim. 1 0 XO_trim. 0
Table 32 Description of XO_trim bits BIT 7 6 5 4 3 2 1 0 6.5.11 SYMBOL - XO_trim.6 XO_trim.5 XO_trim.4 XO_trim.3 XO_trim.2 XO_trim.1 XO_trim.0 add 6 pF to XIN and XOUT add 3 pF to XIN and XOUT add 1.5 pF to XIN and XOUT add 0.75 pF to XIN and XOUT add 0.375 pF to XIN and XOUT add 0.1875 pF to XIN and XOUT add 0.09375 pF to XIN and XOUT DESCRIPTION This bit is reserved and should not be used.
IDENTIFICATION REGISTER (ID)
The Identification Register is used to identify the radio chip set from the baseband controller. This is a read only register. Table 33 Identification Register ADDRESS 19 (decimal) Table 34 Description of ID bits BIT 7 to 0 7 SYMBOL ID.[7:0] DESCRIPTION These 8 bits determine the radio chip set identification (value = A1H). 7 ID.7 6 ID.6 5 ID.5 4 ID.4 3 ID.3 2 ID.2 1 ID.1 0 ID.0
REFERENCE DOCUMENTS
1. UAA3558 Bluetooth RF Transceiver (Philips data sheet). 2. PCF26002 Bluetooth baseband controller (Philips data sheet). 3. BlueRF specification (ARM Ltd).
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Preliminary specification
Bluetooth Adapter IC
8 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDD VDDA VDD(I/O) VDD(osc) Vin Tstg Toper 9 core supply voltage analog supply voltage I/O supply voltage oscillator supply voltage input voltage storage temperature operating temperature DESCRIPTION MIN. VSS - 0.5 VSS - 0.5 VSS - 0.5 VSS - 0.5 VSS - 0.5 -50 0
PCF26100
MAX. VSS + 3.6 VSS + 3.6 VSS + 3.6 VSS + 3.6 VDD + 0.3 +150 +70
UNIT V V V V V C C
DC CHARACTERISTICS DESCRIPTION core supply voltage I/O supply voltage oscillator supply voltage transmit power consumption receive power consumption standby power consumption; note 2 LOW-level input voltage HIGH-level input voltage LOW-level output voltage HIGH-level output voltage input leakage current 2.7 2.7 2.7 - - - -0.5 0.7VDD(I/O) - 2.4 -10 analog supply voltage for ADC and DAC; note 1 2.7 MIN. TYP. 3.0 to 3.3 3.0 to 3.3 3.0 to 3.3 3.0 to 3.3 22 14 3 - - - - - 3.6 3.6 3.6 3.6 - - - +0.3VDD(I/O) VDD + 0.3 0.5 - +10 MAX. UNIT V V V V mW mW mW V V V V A
SYMBOL VDD VDDA VDD(I/O) VDD(osc) Ptx Prx Pstb VIL VIH VOL VOH ILI Notes
1. VDDA should be supplied from a stable source. 2. Standby power consumption is measured when SYS_CLK_REQ = 0.
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
10 AC CHARACTERISTICS SYMBOL Frequency fsys fclk(LP) fs-bus fJTAG fclock Dclock RSSI ADC RES(ADC) LE(ADC) Eoffset(ADC) EFS(ADC) Vi(ADC) Zi(ADC) GFSK DAC RES(DAC) LEDAC(i) LEDAC(diff) Eoffset(DAC) EFS(DAC) Vo(DAC) RL(DAC) CL(DAC) DAC resolution DAC integral linearity error DAC differential linearity error DAC offset error DAC full-scale error DAC signal output voltage range DAC load resistance DAC load capacitance - -1.0 -0.5 -50 -50 0 600 - 8 - - - - - - - - +1.0 +0.5 +50 +50 VDDA - 20 RSSI ADC resolution RSSI ADC linearity error RSSI ADC offset error RSSI ADC full-scale error RSSI ADC signal input voltage range RSSI ADC input impedance - -0.5 -50 -50 0 - 8 0 0 0 - 10 - +0.5 +50 +50 VDDA - system clock frequency low power clock frequency 3-wire S-bus frequency JTAG clock frequency 2.048 MHz clock output duty cycle 2.048 MHz clock output - - - 1 - - 13 3.2 6.5 - 2.048 40/60 - - - 5 - - DESCRIPTION MIN. TYP.
PCF26100
MAX.
UNIT
MHz MHz MHz MHz MHz %
bit LSB mV mV V M
bit LSB LSB mV mV V LSB pF
2001 Jun 19
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book, full pagewidth
2001 Jun 19
XOUT 13 MHz XIN VDD(osc) VDDA VDD(I/O) VDD LPO_CLK SYS_CLK BXTLEN BRCLK BTXD BRXD SYS_CLK_REQ TX_CLK TX_DATA RX_DATA T_SW VSS(osc) VSSA VSS(I/O) VSS VCC
11 APPLICATIONS
Philips Semiconductors
Bluetooth Adapter IC
VCC
VCC(REG) VCC(SYN) REGGND SYNGND BUFGND VCOGND GND CP_TUNE
VREGO VCOA VCOB VREGI VCC(BUF) VCC
VCC(TX)
VCC
VCC
UAA3558
T_GFSK
TXB TXA TXGND T_ON
PCF26100 T_GFSK
BPKTCTL BSEN BnDEN BDCLK BMISO BMOSI PX_ON SYNTH_ON SI_CMS SI_CLK SI_CDO SI_CDI POR BnPWR VCC POR_EXT VIO_POWER R_DATA SLCCTR RSSI REF_CLK S_EN S_DATA S_CLK PACNTL UBMODE
22
R_DATA SLCCTR RSSI REFCLK S_EN S_DATA S_CLK R_ON VCC(RX) BPF
VCC
RXA RXB RXGND
MGT753
Preliminary specification
PCF26100
Fig.5 Application diagram BlueRF JTAG Unidirectional RxMode 2.
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2001 Jun 19
XOUT 13 MHz XIN VDD(osc) VDDA VDD(I/O) VDD LPO_CLK SYS_CLK SYS_CLK_REQ TX_CLK TX_DATA RX_DATA LPO_CLK SYS_CLK SYS_CLK_REQ TX_CLK TX_DATA RX_DATA T_SW VSS(osc) VSSA VSS(I/O) VSS
Philips Semiconductors
Bluetooth Adapter IC
VCC
VCC
VCC(REG) VCC(SYN) REGGND SYNGND BUFGND VCOGND GND CP_TUNE
VREGO VCOA VCOB VREGI VCC(BUF) VCC
VCC(TX)
VCC
VCC
UAA3558
T_GFSK
TXB TXA TXGND T_ON
VWS2600x
PX_ON SYNTH_ON CMS CLK CDI CDO POR
PCF26100 T_GFSK
PX_ON SYNTH_ON SI_CMS SI_CLK SI_CDO SI_CDI POR POR_EXT R_DATA SLCCTR RSSI REF_CLK S_EN S_DATA S_CLK PACNTL UBMODE
23
R_DATA SLCCTR RSSI REFCLK S_EN S_DATA S_CLK R_ON VCC(RX) RXA RXB RXGND
MGT754
BPF
VCC
VCC
VIO_POWER
Preliminary specification
PCF26100
Fig.6 Application diagram VWS2600x.
Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
12 PACKAGE OUTLINE TFBGA48: plastic thin fine-pitch ball grid array package; 48 balls; body 5 x 5 x 0.8 mm
PCF26100
SOT641-1
D
B
A
ball A1 index area A E A1 detail X A2
C e1 e b
w M
vMB y1 C vMA y
H G F E D C B A e1 e
1
2
3
4
5
6
7
8 X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.12 A1 0.28 0.16 A2 0.84 0.76 b 0.37 0.27 D 5.1 4.9 E 5.1 4.9 e 0.5 e1 3.5 v 0.15 w 0.1 y 0.12 y1 0.1
OUTLINE VERSION SOT641-1
REFERENCES IEC JEDEC MO-211 EIAJ
EUROPEAN PROJECTION
ISSUE DATE 00-10-10
2001 Jun 19
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
13 SOLDERING 13.1 Introduction to soldering surface mount packages
PCF26100
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 13.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 13.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. 13.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
13.5 Suitability of surface mount IC packages for wave and reflow soldering methods
PCF26100
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
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Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
14 DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS
PCF26100
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 15 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 16 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2001 Jun 19
27
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For all other countries apply to: Philips Semiconductors, Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2001
Internet: http://www.semiconductors.philips.com
SCA 72
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403506/01/pp28
Date of release: 2001
Jun 19
Document order number:
9397 750 08036

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